I have a special app that uses PIO on the RP2040 to measure quadrature encoders, but I need to reduce hardware costs and latency. I am waiting until March for the official support of running code on the second core of RP1 or any other way to write a user program to PIO. I tried a proof of concept using https://github.com/MichaelBell/rp1-hacking, but it disables Ethernet and USB without any way to recover them. I also tried using an FPGA PCI card connected via a PCI HAT, which reduces latency but is bulky and very expensive.
I hope that some form of support will be released soon. Does anyone know of a specific date or even a general timeframe? Image may be NSFW.
Clik here to view.
I hope that some form of support will be released soon. Does anyone know of a specific date or even a general timeframe? Image may be NSFW.
Clik here to view.

Statistics: Posted by gebha — Sun Aug 11, 2024 4:36 pm