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General • Re: RP2350 E9 bug - also for other GPIOs, e.g. SPI?

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I did see a report somewhere that they had a system that left the MISO floating for some of the higher-order bits of the byte and hadn't bothered to mask off the unused bits;
I'm struggling to see this. SPI is a solidly driven bus - there are no pullups or pulldowns. If you want to multiplex slaves then they 3-state themselves until commanded by the master, which never 3-states itself.
This is someone using the SPI port for something that isn't SPI.
This sounds like one of those "unsupported, if it breaks it's your fault" kind of deals in the first place, even with no silicon bugs in the RP2350 A2.

Statistics: Posted by tabemann — Sat Sep 07, 2024 10:02 pm



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